专利摘要:
Digital PCM coded color television system in which the image is transmitted at a rate of two bits per image point. The luminance is transmitted by a word of p bits every p/2 points and the luminance increments corresponding to the "image contour points" are transmitted by two bits. Color words which are formed of samples of two color components of the image are stored in color transmit storing means and the addresses of the color words in said storing means are transmitted in lieu of the color words themselves. A receive storing means is provided at the receiver station and it is updated from the transmit storing means during the line blanking periods.
公开号:SU733526A3
申请号:SU711693352
申请日:1971-08-31
公开日:1980-05-05
发明作者:Реми Морис;Тартари Даниель
申请人:Оффис Де Радиодиффюзьон-Телевизьон Франсэз (Фирма);
IPC主号:
专利说明:

one
The invention relates to television and can be used in transmitting television systems with code-pulse modulation.
A device for transmitting and receiving color television code signals is known, comprising, on the transmitting side, a color television signal sensor t, U, G, B, the first four outputs of which are connected to an input of an encoder, two outputs of which are connected to the first two inputs of a signal sampling unit, the third input of which is connected to the first input of the encoder and to the input of the increment signal generator, the output of which is connected to the first input of the pulse code modulator, the other three inputs of which are connected to the corresponding outputs of the code ra; the fifth and sixth inputs of the pulse code modulator are connected to the fifth and sixth outputs of the color television signal sensor, the sixth output of which is simultaneously connected to the input of the control unit, the first output of which is connected to the three control inputs of the signal sampling unit, the second output terminal is connected to the six control inputs of the pulse-modulator, the modulator, the first and second outputs of which are connected respectively to the first and second inputs of the recording register, the output of which is through the serially connected memory block and the register the read is connected to the first input of the comparison unit, the second input of which is connected to the output of the write register,
The output of the comparison unit is connected to the input of the address register, the first output of which is connected to the second input of the memory unit, the second output to the first input of the shift register,
16 whose second input is connected to the third output of the pulse code modulator, and the output of the shift register is connected to the first input of the match block, the second input of which is connected to the second output of the read register; the third input of the matching unit is connected to the fourth output of the pulse code modulator and the input of the increment detector, the first and
25, the second outputs of which are connected to the fourth and fifth inputs of the coincidence unit, the sixth and seventh inputs of which are connected to the fifth and sixth outputs of the pulse code module 30, and four control inputs of the coincidence unit are connected to the third, fourth, fifth and the sixth output of the control unit, and the output of the coincidence unit is connected to the first input of the pseudo-tertiary code generator, the second input of which is connected to the third output of the increment detector; on the receiving side, a sync pulse selector, whose input is connected to the first group of inputs of the switch, the second group of inputs of which is connected to the four outputs of the selector, clock pulses, the first two outputs of the mutator are connected to the inputs of the first and second demodulators, respectively; the third output of the switch is connected to the input of the image register, three outputs of which are connected to the first group of inputs of the coincidence unit, the second group of inputs of which is connected to the three outputs of the polarity selector, the input of which is connected to the fourth output of the image register. In addition, the fourth output of the switch is connected to the input of the color register, the output of which is connected to the read register via the memory block; the second input of the memory unit is connected to the output of the color address register, the input of which is. connected to the first output of the coincidence unit, the second output of which is connected via a demodulator of transitions to the first input of the luminance signal generator, the second input of which is connected to the first output of the luminance signal demodulator, the second output of which is connected to the first input of the chrominance signal generator, and the demodulator input The luminance signal is connected to the third output of the match 1 unit.
However, the known device transmits signals with a wide frequency band.
The purpose of the invention is to reduce the frequency band of the transmitted television signal.
For this, a device for transmitting and receiving color television code signals, containing on the transmitter side a color television signal sensor U, 1, C, B, the first four outputs of which are connected to the inputs of the encoder, two outputs of which are connected to the first two inputs of the signal sampling unit, the third the input of which is connected to the primary input of the encoder and to the input of the increment signal generator, the output of which is connected to the first input of the pulse-modulator, the other three: the inputs of which are connected to the corresponding outputs The fifth, fifth and sixth inputs of the pulse code modulator are connected to the fifth and sixth outputs of a color television signal sensor, the sixth output of which is simultaneously connected to 1 by the control unit input, the first output of which is connected to three control inputs of the sampling unit, the second output is connected to the six control inputs of the code / myelnogo modulator, the first and second outputs of which are connected respectively to the first and second inputs of the write register, the output of which is through serially connected memory block and regis The read p is connected to the first input of the comparison unit, the second input of which is connected to the output of the write register, and the output of the comparison unit is connected to the input of the address register, the first output of which is connected to the second input of the memory unit, the second output to the first input of the shift register, the second input which is connected to the third output of the code-pulse modulator, and the output of the shift register is connected to the first input of the match block, the second input of which is connected to the second output of the read register, the third input of the match block is connected to the twist output of the pulse-code modulator and the input of the increment detector, the first and second outputs of which are connected to the fourth and fifth inputs of the coincidence unit, the sixth and seventh inputs of which are connected to the fifth and sixth outputs of the pulse-modulator, and four control inputs the coincidence unit is connected to the third, fourth, fifth and sixth branches of the control unit, and the output of the coincidence unit is connected to the first input of the pseudo-tertiary code generator, the second input of which is connected to the third output of the detector Nij; on the receiving side - a clock selector, the input of which is connected to the first group of inputs of the switch, the second group of inputs of which is connected to the four outputs of the selector of clock pulses; The first two outputs of the switch are connected to the inputs of the first and second demodulators, respectively, while the third output of the switch is connected to the input of the image register, three outputs of which are connected to the first group of inputs of the match block, the second group of inputs of which are connected to the three outputs of the polarity selector. with the fourth output of the image register, the fourth output of the switch is connected to the input of the color register, the output of which is connected to the read register through the PS1m TI unit, and the second input The d block of memory is connected to the output of the color address register, whose input is connected to the first output of the matching block, the second output of which is connected via a demodulator of transitions to the first input of the luminance signal generator, the second input of which is connected to the first output of the luminance demodulator, the second output of which connected to the first input of the color signal generator, and the input of the demodulator of the luminance signal is connected to the third output of the coincidence block; on the receiving side, an adras demodulator and a color demodulator are entered, s which are connected to terminals c readout register, and outputs connected to second and third inputs shaper chrominance signal. Fig. 1 shows a structural electrical circuit of the transmitting side of the device, Fig. 2 shows schematics of the receiving side. A device for transmitting and receiving color television code signals contains a color television signal sensor 1, an encoder 2, a signal sampling unit 3, an increment signal generator 4, a pulse code modulator 5, a control unit 6, a recording register, a memory unit 8 on the transmitting side , read register 9, comparison block 10, address register 11, shift register 12, coincidence block 13, pseudo-triple code shaper 1, increment detector 15, and a clock selector 16 on the receiving side, 1 switch 17, two demodulators 18 and 19 , register 20 image, match block 21, polarity selector 22, color register 23, memory block 24, read register 25, color address register 26, transition demodulator 27, luminance signal former 28, RCy demodulator 29, chrominance signal former 30 , demodulator of 31 addresses, demodulator of 32 chromaticity. The device works as follows. The first output signal from sensor 1 removes the luminance signal from the second, third, and fourth outputs — three primary chroma signals: R is edge, G is green, and B is blue. All of these signals are sent to encoder 2, which turns them into color j.-r / and difference signals Bzi. and Gf and J signals are selected in the selective circuits of block 3 of the sample of signals by sampling pulses supplied by the control block b with a frequency of 2.5 MHz, and the samples obtained in this way are transformed into code pulses in code pulse modulator 5, the first, second and third outputs of which The digital signals b are received in 6 bits, g in 6 bits and (Y in 4 bits; the connection of digital signals g and b gives the word m in 12 bits. The word m is transmitted by the block 6 in parallel to the recording register 7. Before writing it to memory block 8 Consistently compared with the previous words m already written. For this purpose, the address register 11 gradually moves forward, the recorded words are successively transferred to the read register 9 and compared in block 10 with the word written in register 7. If the result of the comparison with the one of the preceding words is positive, the signal issued by block 10 sets the register 11 to the address corresponding to the positive comparison. It is this last address that is transmitted to the receiving toast. If the comparison between the word m and all previous words is negative, this word is recorded in a new cell of memory block 8, and the address of the record is transmitted to the receiving post. In order for the total number of color words to be entered into memory block 8 not to exceed its capacity (16 words), there should be a known shutdown during successive comparisons. Two words will be considered different only if the gap between the values of r will exceed the known threshold π, and the gap between the values of δ will exceed the threshold Ь. It is known that for close comparison it is possible not to take into account the bits of the smallest weight, lg and lh. Instead, they should be selected in the best way depending on the nature of the transmitted images, the noise level before encoding, etc. The signals y and c are sequentially input to the shift register 12 so that a signal p of 8 bits is obtained. The analog signal V is fed to the incremental shaper 4, which produces a horizontal contour signal A. This signal A corresponds to instantaneous image transitions. The audio and horizontal sync signals are converted into code pulses in the pulse code modulator 5. The increment detector 15 controls the corresponding inputs of the coincidence unit 13 so that a signal of 10,11 passes to the shaper 14 of the pseudo-tertiary code. Shaper 14 changes the polarity of the signal to each non-zero bit. For each change in the state of the driver 14, in other words, if the signal a either becomes zero (the beginning of the region is almost homogeneous between the images), or ceases to be zero (horizontal transition), the polarity alternation of the signal of the driver 14 is interrupted and three consecutive bits are transmitted same polarity. The signals modulated in the code pulses thus form trams (the word tram is used here in the sense that it is attached to in the technique of modulating coded pulses, and not in its usual sense for television, the image grid) corresponding to one line of the image. The start of each tram is indicated by a tram synchronization signal. The means for supplying such a synchronizing signal are contained in a code ti Yield modulator 5. The signals modulated in the code pulses are received by the selector 16 (Fig. 2) and are separated according to their localization in the tram. horizontal sync pulses, audio pulses, image pulses and color words; horizontal sync and sound pulses are received by demodulators 18 and 19, respectively, image pulses are in register 2 of the image, color words are in color register 23. Due to the polarity selector 22 of the polarity-sensitive polarity of the successive non-zero bits of the received signal, the signals a, y and c are separated at the output of the register 20. The address c is sent to the address register 26 and to the memory block 24 for color words / signal y - to demodulator 29, at the output of which a luminance signal Y is allocated, corresponding to an almost uniform image band. Signals corresponding to horizontal transitions are obtained on the basis of the signal in the demodulator 27 transitions and in the driver 28 together with the signal from the demodulator 27, forms a full luminance signal. The color word ni is read in register 25 by the command of signal c. Its part g is sent to the demodulator 31 of the address, and part b to the demodulator 32 of the chromaticity. At the output of these demodulators, chroma signals are obtained respectively. These two signals in the imaging unit 30 form the R, G, B signals. Formula of the invention A device for transmitting and receiving color television code signals, containing, on the transmitting side, a color television signal sensor, R, G, B, the first four outputs of which are connected to the encoder inputs , two outputs of which are connected ttti with the first two inputs of the signal sampling block, the third input of which is connected to the first input of the co-, pa and to the input of the increment signal generator, the output of which is connected to the first input of the code-pulse modulator, mp the other inputs of which are connected to the corresponding outputs of the encoder, the fifth and sixth inputs of the code pulse modulator are connected to the fifth and sixth outputs of the color television signal sensor, the sixth output of which is simultaneously connected to the input of the control unit, the first output of which is connected to the signals The second output is connected to the six control inputs of the pulse-pulse modulator, the first and the second outputs of which are connected respectively to the first and second inputs of the write register, you the stroke of which through the serially connected memory block and read register is connected to the first input of the comparison unit, the second input of which is connected to the output of the write register, and the output of the comparison unit is connected to the input of the address register, the first output of which is connected to the second memory input, the second output - to the first input of the shift register, the second pass of which is connected to the third output of the code pulse modulator, and the output of the shift register is connected to the first input of the coincidence unit, the second input of which is connected to the second output ode read register; the third input of the coincidence unit is connected to the fourth output of the pulse-pulse modulator and the input of the increment detector, the first and second outputs of which are connected to the fourth and fifth inputs of the coincidence unit; the sixth and seventh inputs of which are connected to the fifth and sixth outputs -pulse modulator, the four control inputs of the coincidence unit are connected to the third, fourth, five and sixth outputs of the control unit, and the output of the coincidence unit is connected to the first input of the pseudo-triple generator code, a second input coupled to a third output increment detector; on the receiving side - a clock selector, whose input is connected to the first group of inputs of the switch, the second group of inputs of which is connected to four outputs of the selector clock, the first two outputs of the switch are connected to the inputs of the first and second demodulators, respectively, the third output of the switch is connected to the register input the image, the three outputs of which are connected to the first group of inputs of the match block, the second group of inputs of which are connected to the three outputs of the polarity selector, the input
which is connected to the fourth output of the image register; in addition, the fourth output of the switch is connected to the input of the color register, the output of which is connected to the read register through the memory unit, while the second input of the memory unit is connected to the output of the color address register, which input is connected to the first output of the coincidence unit, the second output of which is connected via a transition demodulator to the first input of the luminance signal generator, the second input of which is connected to the first output of the luminance signal demodulator, the second output of which The first is connected to the first input of a chroma signal body, and the input of a luminance signal demodulator is connected to a third output of a matching block, characterized in that, in order to reduce the frequency band of the transmitted television signal, the address demodulator and the chrominance demodulator, inputs are entered at the receiving side which are connected to the outputs of the register of reading, and outputs with the second and third inputs of the chrominance signal generator.
Sources of information taken into account in the examination
1. French patent number 1489034, 15 cells. H 04 N, 1967 (prototype).
权利要求:
Claims (1)
[1]
Claim
A device for transmitting and receiving color television code signals, comprising, on the transmitting side, a color television signal sensor U, R, G, E, the first four outputs of which are connected to the inputs of the encoder, two outputs of which are connected to the first two inputs of the signal sampler, the third input which is connected to the first input of the code-., RA and to the input of the increment signal generator, the output of which is connected to the first input of the code-pulse modulator, the other three inputs of which are connected to the corresponding outputs of the encoder, fifth and the sixth inputs of the code-pulse modulator are connected to the fifth and sixth outputs of the color television signal sensor, the sixth output of which is simultaneously connected to the input of the control unit, the first output of which is connected to three • control inputs of the signal sampling unit, the second output is connected to six control inputs of the code-pulse modulator , the first and second outputs of which are connected respectively to the first and second inputs of the recording register, the output of which is read through the memory block and the register in series The input is connected to the first input of the comparison unit, the second input of which is connected to the output of the recording register, and the output of the comparison unit is connected to the input of the address register, the first output of which is connected to the second input of the memory unit, the second output - to the first input of the shift register, the second input of which is connected with the third output of the code-pulse modulator, and the output of the shift register is connected to the first input of the coincidence unit, the second input of which is connected to the second output of the read register, the third input of the coincidence unit is connected to the fourth output m pulse-code modulator and the input of the increment detector, the first and second outputs of which are connected to the fourth and fifth inputs of the coincidence unit, the sixth and seventh inputs of which are connected to the fifth and sixth outputs of the code-pulse modulator, and the four control inputs of the coincidence unit are connected to the third, the fourth, fifth and sixth outputs of the control unit, and the output of the coincidence unit is connected to the first input of the pseudo-ternary code generator, the second input of which is connected to the third output of the increment detector; on the receiving side there is a clock selector, the input of which is connected to the first group of inputs of the switch, the second group of inputs of which is connected to four outputs of the clock selector, the first two outputs of the switch are connected to the inputs of the first and second demodulators, respectively, while the third output of the switch is connected to the input of the image register , the three outputs of which are connected to the first group of inputs of the coincidence unit, the second group of inputs of which is connected to the three outputs of the polarity selector, the input [of which is connected is connected to the fourth output of the image register, in addition, the fourth output of the switch is connected to the input of the color register, the output of which is connected to the read register through the memory block, and the second input of the memory block is connected to the output of the color address register, the input of which is connected to the first output of the block coincidence, the second output of which is connected through the transition demodulator to the first input of the luminance signal former, the second input of which is connected to the first output of the luminance signal demodulator, the second output of which is connected to the input of the chroma signal generator, and the input of the luminance signal de-modulator is connected to the third output of the coincidence unit, characterized in that, in order to narrow the frequency band of the transmitted television signal, an address demodulator and a color demodulator are introduced at the receiving side, the inputs of which are connected with the outputs of the read register, and the outputs with the second and third inputs of the colorizer.
类似技术:
公开号 | 公开日 | 专利标题
SU733526A3|1980-05-05|Device for transmitting and receiving coded colour tv signals
US4245235A|1981-01-13|Method and system for transmitting and/or recording color T.V. signals
US4163248A|1979-07-31|Field sequential transmission of luminance and chrominance information
GB1268136A|1972-03-22|Multiple signal transmission system of one or more information signals on a colour television signal
US4215369A|1980-07-29|Digital transmission system for television video signals
US3993862A|1976-11-23|Data compression
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同族专利:
公开号 | 公开日
FR2101155B1|1974-09-20|
DE2142272B2|1973-03-01|
SE376349B|1975-05-12|
GB1345922A|1974-02-06|
DE2142272A1|1972-03-16|
US3720780A|1973-03-13|
JPS5120128B1|1976-06-23|
FR2101155A1|1972-03-31|
NL7111971A|1972-03-02|
DE2142272C3|1973-09-13|
NL175128C|1984-09-17|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题

GB1344312A|1971-08-27|1974-01-23|Post Office|Digital encoding system|
GB1452489A|1973-12-20|1976-10-13|Int Computers Ltd|Colour display apparatus|
US4212027A|1974-04-25|1980-07-08|Ampex Corporation|Time base compensator|
JPS5515147B2|1974-05-02|1980-04-21|
US3946432A|1974-10-10|1976-03-23|Cbs Inc.|Apparatus for digitally encoding a television signal|
US4015286A|1975-01-23|1977-03-29|Eli S. Jacobs|Digital color television system|
US4155095A|1976-09-16|1979-05-15|Alpex Computer Corporation|Chroma control for television control apparatus|
US4150397A|1977-09-13|1979-04-17|Eli S. Jacobs|Repetition reduced digital data record and playback system|
FR2599205B1|1981-11-27|1990-08-24|Thomson Csf|RECURRING METHOD FOR CHARACTERIZING ISOTROPIC AREAS IN A VIDEO IMAGE; MOTION DETECTOR AND NOISE DETECTOR IN A SEQUENCE OF IMAGES|
EP0087284A1|1982-02-19|1983-08-31|THE GENERAL ELECTRIC COMPANY, p.l.c.|Image storage and transmission systems|
EP0097858B1|1982-06-11|1991-12-18|Mitsubishi Denki Kabushiki Kaisha|Vector quantizer|
AT26513T|1982-12-02|1987-04-15|Thorn Emi Ferguson|TELEVISION RECEIVER.|
EP0446968B1|1983-09-06|1995-07-05|Mitsubishi Denki Kabushiki Kaisha|Vector quantizer|
US5389922A|1993-04-13|1995-02-14|Hewlett-Packard Company|Compression using small dictionaries with applications to network packets|
法律状态:
优先权:
申请号 | 申请日 | 专利标题
FR7031704A|FR2101155B1|1970-08-31|1970-08-31|
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